SAT-Based Logic Synthesis

Relatore
Alan Mishchenko - University of California Berkeley
Data e ora
lunedì 5 giugno 2017 alle ore 17.30 - Sala Riunione II piano
Referente
Referente esterno
Data pubblicazione
5 giugno 2017
Dipartimento
Informatica  

Riassunto

This presentation focuses on the use of Boolean satisfiability as a computation engine in solving typical problems arising in logic synthesis. In particular, a new SAT-based algorithm is presented to compute canonical irredundant sums-of-products (ISOPs) similar to Minato’s well-known BDD/ZDD-based ISOP computation. In addition, a SAT-based formulation of Boolean resubstitution and Engineering Change Order (ECO) is presented. A practical advice is given on the efficient use of SAT solvers in a variety of other practical applications. Contact person: Tiziano Villa





© 2002 - 2021  Universit√† degli studi di Verona
Via dell'Artigliere 8, 37129 Verona  |  P. I.V.A. 01541040232  |  C. FISCALE 93009870234